2.2 Pin list
Table 2.1 Pin Arrangement Diagram
Pin
Number
Name
Type
Pin Description
1
HPVCC
AP
The headphone output amplifier simulates a 3.3V
power supply.
2
LINEOUT1
AO
Headphone output.
3
HPGND
AG
Built-in Codec analog ground.
4
CDC_VREF
AO
Built-in Codec reference power supply.
5
MIC_P
AI
The positive side of the differential input of the
microphone.
6
MIC_N
AI
The negative side of the differential input of the
microphone.
7
LINEIN1
AI
Microphone single-ended input 1.
8
LINEIN2
AI
Microphone single-ended input 2.
9
CDC_AVCC
AP
Codec simulates a 3.3V power supply.
10
LINEOUT2
AO
Line-out output, need to add external amplifier
drive.
11
VREFL
AG
The external reference of the microphone is
connected to the analog ground.
12
PLL_VDD33
AP
The PLL simulates a 3.3V supply.
13
PLL_VSS33
AG
The PLL simulates ground.
14
XTALI
DI
System clock, active crystal input.
15
CLKOUT
DO
HR_C6000 output clock, when output by PLL
clock divider is obtained, the division ratio is
matched by reg0xBB Set. Available for external
Codec or external vocoder use.
External Codec interface working clock, which is
clocked by CLKOUT is provided if the external
Codec is not used CLKOUT, the clock needs to be
external Codec's working clock; also multiplexed
as a radio The digital control of the sender is
enabled.
16
MCLK/RF_ANT_EN
DIO
Codec's working clock; also multiplexed as a
radio digital control of the sender is enabled.
17
LRCK/RF_3TC_EN
DO
External Codec left and right channel selection
enable; multiplexing
Digital control is enabled as the RF transmitter.
18
BCLK/RF_3RC_EN
DO
External Codec bit clock; multiplexed as RF
Receiver digital control is enabled.
19
ADCDAT/RF_5TC_EN
DIO
External Codec audio ADC sampling data;
multiplexing As the RF transmitter is digitally
