OMISSIS
Figure 4.7 Interface between MCU and HR_C6000
The chip's U_SPI interface operates in Slave mode, and the interface timing is shown in the figure
below.
OMISSIS
Figure 4.8 U_SPI Interface Read and Write Timing
SCLK supports up to 4MHz clock rate.
The MCU can control the Sleep state of the HR_C6000 through the GPIO pin. When the GPIO is
pulled high, the chip is in the Sleep state, and all clocks in the HR_C6000 are turned off.
