2.3.2.7 DRAM Refresh Controller
The H8 CPU is equipped with a refresh controller in the internal controller. This CPU can contact
the 16-bit-long IC5 DRAM, which is a 2 CAS type. The following table lists the junction method
between the H8 CPU and the 2 CAS DRAM.
Table 2-10. Junction Method (CPU — 2 CAS DRAM)
CPU
2 CAS DRAM
HWR
UCAS
LWR
LCAS
CS3
RAS
RD
WR
The method of the DRAM refresh is used only for the CAS before RAS cycle method. The following
figure shows the timing for each cycle.
C A S
R A S
W E
A S
C A S
R A S
W E
A S
Re ad Cyc le
Writ e Cycle
(Read / Write Cycle)
(Re fre sh Cycle)
Figure 2-27. DRAM Cycle Timing
CPU H8 (I C1)
DR A M ( I C5 )
C A S
R A S
W E
O E
2 3
8
7
2 2
7 9
8 0
7 8
1 01
DRAM (IC6 )
2 3
C S 3
R D
C A S
R A S
W E
O E
8
7
2 2
Figure 2-28. Junction Method (CPU — DRAM)
Stylus Pro XL
Operating Principles
REV.-A
2-23
Summary of Contents for Stylus Pro XL
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