S1R72105 Technical Manual
Rev.1.0
EPSON
25
* Operation settings of the port interface
The following list shows the operational settings made by the bit setting:
1) Selecting master/slave of the port by PSLV bit
PDREQ
XPDACK
XPRD/XPWR
Remarks
PSLV=0
(Master)
Input
Output
Output
Data input during XPRD
Data output during XPWR
PortConfig_1 register setting enabled
XPRD/XPWR pulse width:
Assert
≥
40ns
Negate
≥
40ns
PSLV=1
(Slave)
Output
Input
Input
Data output during XPRD
Data input during XPWR
PortConfig_1 register setting disabled
XPRD/XPWR pulse width:
Assert
≥
30ns
Negate
≥
30ns
2) Selecting operation modes by BUS8/SWAP/ODS bit
BUS8=0
SWAP=0 PD7 to 0 is transferred first.
If ODS = 1, PD7 to 0 is discarded when the first one word is transferred, and
only PD15 to 8 is transferred.
PD7 to 0 is used when the last data to be transferred is not a word but a byte.
SWAP=1 PD15 to 8 is transferred first.
If ODS = 1, PD15 to 8 is discarded when the first one word is transferred, and
only PD7 to 0 is transferred.
PD15 to 8 is used when the last data to be transferred is not a word but a byte.
BUS8=1
Only PD7 to 0 is used for transfer.
PD15 to 8 goes into Input mode (connect to GND or HV
DD
).
7.3.18 Port Config 1 (PortConfig_1) R/W
Sets the operation mode of the port interface.
Address
Register Name
Bit Symbol
Description
15h PortConfig_1
7:
AssertPulseWidth[3]
6:
AssertPulseWidth[2]
5:
AssertPulseWidth[1]
4:
AssertPulseWidth[0]
Assert Pulse Width
3:
NegatePulseWidth[3]
2:
NegatePulseWidth[2]
1:
NegatePulseWidth[1]
0:
NegatePulseWidth[0]
Negate Pulse Width
BIT7-4 Assert Pulse Width
Sets the assert pulse width of XPRD/XPWR when the port interface operates in Master mode.
The width is the internal operation clock cycle (40 MHz) multiplied by [AssertPuls 2].
ex. 0000: 2×25ns=50ns
0001: 3×25ns=75ns
BIT3-0 Negate Pulse Width
Sets the negate pulse width of XPRD/XPWR when the port interface operates in Master mode.
The width is the internal operation clock cycle (40 MHz) multiplied by [NegatePuls 2].
ex. 0000: 2×25ns=50ns
0001: 3×25ns=75ns
