S1R72105 Technical Manual
20
EPSON
Rev.1.0
7.3.7 Interrupt Enable Window 0 (IntEnbWindow_0) R/W
The register enabling/disabling endpoint interruption appears.
The interrupt status to be displayed changes according to the value set at IntIndex_0 of the IntIndex register
(08h).
For set value of the IntIndex register, refer to section “7.4 Detailed Description of Set Values of IntIndex
Register.”
Address
Register Name
Bit Symbol
Description
06h
IntEnbWindow_0
7: IntEnbWindow_0 [7]
6: IntEnbWindow_0 [6]
5: IntEnbWindow_0 [5]
4: IntEnbWindow_0 [4]
3: IntEnbWindow_0 [3]
2: IntEnbWindow_0 [2]
1: IntEnbWindow_0 [1]
0: IntEnbWindow_0 [0]
Interrupt Enable Window 0
7.3.8 Interrupt Enable Window 1(IntEnbWindow_1) R/W
The register enabling/disabling endpoint interruption appears.
The interrupt status to be displayed changes according to the value set at IntIndex_1 of the IntIndex register
(08h).
For set value of the IntIndex register, refer to section “7.4 Detailed Description of Set Values of IntIndex
Register.”
Address
Register Name
Bit Symbol
Description
07h
IntEnbWindow_1
7: IntEnbWindow_1 [7]
6: IntEnbWindow_1 [6]
5: IntEnbWindow_1 [5]
4: IntEnbWindow_1 [4]
3: IntEnbWindow_1 [3]
2: IntEnbWindow_1 [2]
1: IntEnbWindow_1 [1]
0: IntEnbWindow_1 [0]
Interrupt Enable Window 1
7.3.9 Interrupt Index(IntIndex) R/W
Sets registers to be displayed in the IntStatWindow and IntEnbWindow registers.
For set value of the IntIndex register, refer to section “7.4 Detailed Description of Set Values of IntIndex
Register.”
Address
Register Name
Bit Symbol
Description
08h IntIndex
7:
IntIndex_0[3]
6:
IntIndex_0[2]
5:
IntIndex_0[1]
4:
IntIndex_0[0]
Interrupt Index 0
3:IntIndex_1[3]
2:
IntIndex_1[2]
1:
IntIndex_1[1]
0:
IntIndex_1[0]
Interrupt Index 1
BIT7-4 Interrupt Index 0
Set registers to be displayed in IntStatWindow_0 and IntEnbWindow_0.
BIT3-0 Interrupt Index 1
Set values to be displayed in IntStatWindow_1 and IntEnbWindow_1.
