DIGITAL-LOGIC MICROSPACE MSEP800, Technical User'S Manual

Page: 51 / 140

DIGITAL-LOGIC AG
MSEP800 Manual V1.0G
51
I/O Addr. Function Size R/W Comment
000h Slave DMA Address - Channel 0 8-bit Yes 16-bit values in two transfers.
001h Slave DMA Counter - Channel 0 8-bit Yes 16-bit values in two transfers.
002h Slave DMA Address - Channel 1 8-bit Yes 16-bit values in two transfers.
003h Slave DMA Counter - Channel 1 8-bit Yes 16-bit values in two transfers.
004h Slave DMA Address - Channel 2 8-bit Yes 16-bit values in two transfers.
005h Slave DMA Counter - Channel 2 8-bit Yes 16-bit values in two transfers.
006h Slave DMA Address - Channel 3 8-bit Yes 16-bit values in two transfers.
007h Slave DMA Counter - Channel 3 8-bit Yes 16-bit values in two transfers.
008h
Slave DMA Command/Status - Channels
[3:0]
8-bit Shw$
009h Slave DMA Request - Channels [3:0] 8-bit WO Reads return value B2h.
00Ah Slave DMA Mask - Channels [3:0] 8-bit Shw@ Reads return value B2h.
00Bh Slave DMA Mode - Channels [3:0] 8-bit Shw@ Reads return value B2h.
00Ch Slave DMA Clear Pointer - Channels [3:0] 8-bit WO Reads return value B2h.
00Dh Slave DMA Reset - Channels [3:0] 8-bit WO Reads return value B2h.
00Eh Slave DMA Reset Mask - Channels [3:0] 8-bit Shw@ Reads return value B2h.
00Fh Slave DMA General Mask - Channels [3:0] 8-bit Shw@ Reads return value B2h.
010h-01Fh No Specific Usage --- ---
020h PIC Master - Command/Status 8-bit Shw$
021h PIC Master - Command/Status 8-bit Shw$
022h-03Fh
No Specific Usage --- ---
040h PIT – System Timer 8-bit Shw$
041h PIT – Refresh Timer 8-bit Shw$
042h PIT – Speaker Timer 8-bit Shw$
043h PIT – Control 8-bit Shw$
044h-05Fh No Specific Usage --- ---
If KEL Memory Offset 100h[0] =
1(EmulationEnable bit).
060h Keyboard/Mouse - Data Port 8-bit Yes
If MSR 5140001Fh[0] = 1 (SNOOP bit) and
KEL Memory Offset 100h[0] = 0 (Emula-
tionEnable bit).
061h Port B Control 8-bit Yes
062h-063h
No Specific Usage --- ---
If KEL Memory Offset 100h[0] = 1
(EmulationEnable bit).
.
064h Keyboard/Mouse - Command/ Status 8-bit Yes
If MSR 5140001Fh[0] = 1 (SNOOP
bit) and KEL Memory Offset 100h[0]
= 0 (EmulationEnable bit)
065h-06Fh No Specific Usage --- ---
070h-071h RTC RAM Address/Data Port 8-bit Yes Options per MSR 51400014h[0]. (Note 1)
072h-073h
High RTC RAM Address/Data Port 8-bit Yes Options per MSR 51400014h[1].
074h-077h
No Specific Usage --- ---
078h-07Fh
No Specific Usage --- ---
080h Post Code Display 8-bit Rec Write LPC and DMA. Read only DMA.
081h DMA Channel 2 Low Page
082h DMA Channel 3 Low Page
083h DMA Channel 1 Low Page
8-bit Rec
Upper addr bits [23:16]. Write LPC and
DMA. Read only DMA.
084h-086h No Specific Usage 8-bit Rec Write LPC and DMA. Read only DMA.