DIGITAL-LOGIC MICROSPACE MSEP800, Technical User'S Manual

Page: 109 / 140

DIGITAL-LOGIC AG
MSEP800 Manual V1.0G
109
12.2.3 General Purpose Input / Output Ports
A connector with three eight bit General Purpose Input / Output ports (GPIO_A, GPIO_B, GPIO_C) with 5
Volt tolerant I/O pins accept 5 V and 3.3 V input signals, the output capability is 3.3 Volt. A General Purpose
register controls the direction of each I/O port individually.
Warning:
The input / output pins on the connectors are connected directly to the CPLD without any buffer
or ESD protection circuit. Therfore it is recomanded that the applied I/O voltages are within the
electrical parameters of the chip.
=> See chapter CPLD input / output electrical parameters.
Three data registers with tristate output buffer build the bidirectional 8-bit data port.
Input is the default direction and the output buffer is tristated.
A read on the I/O address capture the data set up by the connector and a write stores the content in the
register.
To enable the output set the corresponding bit in the GP_OE at I/O address 241hex to 1.
D Q
[7:0]
SD[7:0]
GPIO_A Data Register
8-bit I/O 160h
GPIO_A[7:0]
OE[0]
D Q
[7:0]
GPIO_B Data Register
8-bit I/O 260h
GPIO_B[7:0]
OE[1]
D Q
[7:0]
GPIO_C Data Register
8-bit I/O 360h
GPIO_C[7:0]
OE[2]
D Q
[7:0]
OE
D[0]
Q[0]
D[1]
Q[1]
GPIO_ OE Register
3-bit I/O 241h
MUX
ISA bus
General
Purpose
Input /
Output