Cypress S6E2C1 Series, Manual

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MainFlash Memory
S6E2CC/C5/C4/C3/C2/C1 Series Flash Programming Specification, Document Number: 002-04913 Rev. *D 42
1.4 Registers
This section explains the registers.
List of Registers
Abbreviated
Register Name
Register Name Reference
FASZR Flash Access Size Register 1.4.1
FRWTR Flash Read Wait Register 1.4.2
FSTR Flash Status Register 1.4.3
FSYNDN Flash Sync Down Register 1.4.4
FBFCR Flash Buffer Control Register 1.4.5
FICR Flash Interrupt Register 1.4.6
FISR Flash Interrupt Status Register 1.4.7
FICLR Flash Interrupt Clear Register 1.4.8
DFCTRLR Dual Flash mode Control Register 1.4.9
CRTRMM CR Trimming Data Mirror Register 1.4.10
FGPDM1 Flash General Purpose Data Mirror Register1 1.4.11
FGPDM2 Flash General Purpose Data Mirror Register2 1.4.12
FGPDM3 Flash General Purpose Data Mirror Register3 1.4.13
FGPDM4 Flash General Purpose Data Mirror Register4 1.4.14
FERRAD Flash ECC ERR Address Capture Register 1.4.15
DFASZR Dual Flash Access Size Register 1.4.16
DFRWTR Dual Flash Read Wait Register 1.4.17
DFSTR Flash Status Register 1.4.18
1.4.1 FASZR (Flash Access Size Register)
This section explains the FASZR.
This register configures the access size for flash memory except DualFlash area. After reset is released, ASZ is set to
"0b10" (32-bit read), and the flash memory enters CPU ROM mode. To put the flash memory into CPU programming
mode, set ASZ to "0b01".
bit 7 6 5 4 3 2 1 0
Field Reserved ASZ
Attribute RW RW
Initial Value 1 0
[bit7:2] Reserved bits
The read values are undefined. Ignored on write.
[bit1:0] ASZ: Access Size
Specifies the access size of the flash memory.
Field bit Description
ASZ 1:0
Flash Access Size
00: Setting prohibited
01: 16-bit read/write (CPU programming mode)
10: 32-bit read (CPU ROM mode: Initial value)
11: Setting prohibited
Notes:
−
When ASZ is set to "0b01", always perform writes to flash using half-word access (16-bit access).
−
Do not change this register using an instruction that is contained in the flash memory. Overwrite this register from a
program in any other area except for flash memory.
−
Perform a dummy read to register, after changing this register.
−
When ASZ="0b01", BS bit and BE bit in FBFCR register are both cleared to "0", and the trace buffer function is set to
OFF.