Cypress S6E2C1 Series, Manual

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MainFlash Memory
S6E2CC/C5/C4/C3/C2/C1 Series Flash Programming Specification, Document Number: 002-04913 Rev. *D 58
1.4.18 DFSTR (Flash Status Register)
This section explains the DFSTR.
In the dual flash mode (DFCTRLR:DFE=
”1”), this is a status register of the DualFlash area.
bit 7 6 5 4 3 2 1 0
Field Reserved DFERR DFHNG DFRDY
Attribute RW R R
Initial Value 0 0 X
[bit7:3] Reserved bits
The read values are undefined. Ignored on write.
[bit2] DFERR: Dual Flash ECC Error
This bit is set to "1" if ECC error correction occurs.
Field bit Description
DFERR 2
Dual Flash ECC Error
On read:
0: Correction due to an ECC error has not occurred.
1: Correction due to an ECC error has occurred.
On write:
0: Clears this bit.
1: Ignored.
[bit1] DFHNG: Dual Flash Hang
Indicates whether the DualFlash area of flash memory is in the HANG state. Flash memory enters the HANG state if the
timing is exceeded (See "[bit5] TLOV: Timing Limit Exceeded Flag Bit"). If this bit becomes "1", issue a reset command.
(See Section "
1.3.2.1 Command Sequence ")
Because the correct value might not be read out immediately after issuing an automatic algorithm command, ignore the
value of this bit as read out the first time after a command is issued.
Field Bit Description
DFHNG 1
Dual Flash Hang
0: The DualFlash area of flash memory HANG state has not been detected.
1: The DualFlash area of flash memory HANG state has been detected.
[bit0] DFRDY: Dual Flash Rdy
Indicates whether a DualFlash area of flash memory write or erase operation using the automatic algorithm is in progress
or finished. Also indicates whether the DualFlash mode switching is in progress or finished. While an operation is in
progress, data cannot be written and the DualFlash area cannot be erased.
Field Bit Description
DFRDY 0
Dual Flash Rdy
0: Operation in progress (cannot write or erase)
1: Operation finished (can write or erase)
Because the correct value might not be read immediately after an automatic algorithm command is issued, ignore the
value of this bit as read the first time after a command is issued.
Note:
−
While dual flash mode is disabled (DFCTRLR : DFE=
”0”), the read value is invalid.