S6E2CC/C5/C4/C3/C2/C1 Series Flash Programming Specification, Document Number: 002-04913 Rev. *D
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1.4.16 DFASZR (Dual Flash Access Size Register)
This section explains the DFASZR.
In the dual flash mode (DFCTRLR:DFE=
”1”), specifies the access size of DualFlash area.
bit
7
6
5
4
3
2
1
0
Field
Reserved
DASZ
Attribute
RW
RW
Initial Value
1
0
[bit7:2] Reserved bits
The read values are undefined. Ignored on write.
[bit1:0] DASZ: Dual Flash Access Size
Specifies the access size of the flash memory.
Field
bit
Description
DASZ
1:0
Dual Flash Access Size
00: Setting prohibited
01: 16-bit read/write (CPU programming mode)
10: 32-bit read (CPU ROM mode: Initial value)
11: Setting prohibited
Notes:
−
When DASZ is set to "0b01", always perform writes to flash using half-word access (16-bit access).
−
Do not change this register using an instruction that is contained in the DualFlash area. Overwrite this register from a
program in any other area except for the DualFlash area.
−
Perform a dummy read to register, after changing this register.
−
While dual flash mode is disabled (DFCTRLR : DFE=
”0”), writing to DFASZR is prohibited.
