S6E2CC/C5/C4/C3/C2/C1 Series Flash Programming Specification, Document Number: 002-04913 Rev. *D
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1.4.14 FGPDM4 (Flash General Purpose Data Mirror Register4)
This section explains the FGPDM4.
This is the mirror register of the general purpose data4.
bit
31
0
Field
GPD4
Attribute
R
Initial value
*
[bit31:0] GPD4 : General Purpose Data4
After reset is released, store the bit[31:0]
in an address of “0x0040_400C” (general purpose data4) of the flash memory
area into this register.
Field
bit
Description
GPD4
31:0
*: Reads out bit[31:0]
of an address of “0x0040_400C”.
Notes:
−
After the flash memory is lost, as this register is cleared when reset is issued in a chip, the stored general purpose
data4 is lost. Therefore, before this register is cleared, save the general purpose data4 stored in the register on the
RAM, etc.
−
When Re-Map function is enabled, this value does not change.
1.4.15 FERRAD (Flash ECC ERR Address Capture Register)
This section explains FERRAD.
This register saves the address when ECC error correction of read data of Flash memory except DualFlash area is
generated.
bit
31
22
0
Field
Reserved
ERRAD
Attribute
R
Initial value
0
[bit31:23] Reserved bits
The read values are undefined. Ignored on write.
[bit22:0] ERRAD : Flash ECC ERR Address Capture Register
This register saves the address when ECC error correction of read data of Flash memory except DualFlash area is
generated.
Field
bit
Description
ERRAD
22:0
Saves the address when ECC error correction is generated.
Note:
−
An address once stored is retained until ERR bit of FSTR register is set to "1" again. That is to say, without clearing
FSTR:ERR bit, the address stored at first is stored irrespective of the continuous generation of ERR.
