Baud Rate
Persistent Store Value
Error
Hex
Dec
19200
0x004f
79
0.45%
38400
0x009d
157
-0.18%
57600
0x00ec
236
0.03%
76800
0x013b
315
0.14%
115200
0x01d8
472
0.03%
230400
0x03b0
944
0.03%
460800
0x075f
1887
-0.02%
921600
0x0ebf
3775
0.00%
1382400
0x161e
5662
-0.01%
1843200
0x1d7e
7550
0.00%
2764800
0x2c3d
11325
0.00%
3686400
0x3afb
15099
0.00%
Table 7.2: Standard Baud Rates
7.3
Programming and Debug Interface
CSR8640 BGA provides a debug SPI interface for programming, configuring (PS Keys) and debugging the
CSR8640 BGA. Access to this interface is required in production. Ensure the 4 SPI signals and the SPI/PCM# line
are brought out to either test points or a header. To use the SPI interface, the SPI/PCM# line requires the option of
being pulled high externally.
CSR provides development and production tools to communicate over the SPI from a PC, although a level translator
circuit is often required. All are available from CSR.
7.3.1
Multi-slave Operation
Avoid connecting CSR8640 BGA in a multi-slave arrangement by simple parallel connection of slave MISO lines.
When CSR8640 BGA is deselected (SPI_CS# = 1), the SPI_MISO line does not float. Instead, CSR8640 BGA
outputs 0 if the processor is running or 1 if it is stopped.
7.4
I²C EEPROM Interface
CSR8640 BGA supports optional I²C EEPROM for storage of PS Keys and voice prompt data if SPI flash is not used.
Figure 7.2 shows an example I²C EEPROM connection where:
■
PIO[10] is the I²C EEPROM SCL line
■
PIO[11] is the I²C EEPROM SDA line
■
PIO[12] is the I²C EEPROM WP line
Advance Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 32 of 110
CS-209182-DSP1
CSR8640 BGA
Data Sheet