G-
T
W
-000
8946.1.2
SMPS_1V35_SENSE
LX_1V35
1.35V Switch-
mode Regulator
SENSE
LX
L1
4.7µH
C3
4.7µF
1.35V Supply Rail
VSS_SMPS_1V35
VBAT
3V3_USB
To 1.8V Switch-mode
Regulator Input
C1
2.2µF
C2
2.2µF
Figure 10.4: 1.35V Switch-mode Regulator Output Configuration
Ensure the series resistance of the tracks is minimised between the regulator input, VBAT and 3V3_USB, ground
terminals, the filter and decoupling components, and the external voltage source to maintain high-efficiency power
conversion and low supply ripple.
Ensure a solid ground plane between C1, C2, C3 and VSS_SMPS_1V35.
Also minimise the collective parasitic capacitance on the track between LX_1V35 and the inductor L1, to maximise
efficiency.
For the regulator to meet the specifications in Section 13.3.2.1 requires a total resistance of <1.0Ω (<0.5Ω
recommended) for the following:
■
The track between the battery and VBAT.
■
The track between LX_1V8 and the inductor.
■
The inductor, L1, ESR.
■
The track between the inductor, L1, and the sense point on the 1.35V supply rail.
The following enable the 1.35V switch-mode regulator:
■
VREGENABLE pin
■
The CSR8640 BGA firmware with reference to PSKEY_PSU_ENABLES
■
VCHG pin
The switching frequency is adjustable by setting an offset from 4.00MHz using PSKEY_SMPS_FREQ_OFFSET,
which also affects the 1.80V switch-mode regulator.
When the 1.35V switch-mode regulator is not required, leave unconnected:
■
The regulator input VBAT and 3V3_USB
■
The regulator output LX_1V35
10.3
1.8V and 1.35V Switch-mode Regulators Combined
For applications that require a single 1.80V supply rail with higher currents CSR recommends combining the outputs
of the integrated 1.80V and 1.35V switch-mode regulators in parallel to power a single 1.80V supply rail, see Figure
10.5.
Figure 10.5 shows that an external LC filter circuit of a low-resistance series inductor L1 (4.7µH), followed by a low
ESR shunt capacitor, C3 (2.2µF), are required between the LX_1V8 terminal and the 1.80V supply rail. A connection
between the 1.80V supply rail and the VDD_AUX_1V8 pin is required and the SMPS_1V35_SENSE pin is grounded.
Advance Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 64 of 110
CS-209182-DSP1
CSR8640 BGA
Data Sheet
