■
Generating these signals by DDS from CSR8640 BGA internal 4MHz clock. Using this mode limits
PCM_CLK to 128, 256 or 512kHz and PCM_SYNC to 8kHz.
■
Generating these signals by DDS from an internal 48MHz clock (which enables a greater range of
frequencies to be generated with low jitter but consumes more power). To select this second method set
bit 48M_PCM_CLK_GEN_EN in PSKEY_PCM_CONFIG32. When in this mode and with long frame sync,
the length of PCM_SYNC is either 8 or 16 cycles of PCM_CLK, determined by LONG_LENGTH_SYNC_EN
in PSKEY_PCM_CONFIG32.
Equation 9.3 describes PCM_CLK frequency when generated from the internal 48MHz clock:
f =
CNT_RATE
CNT_LIMIT
× 24MHz
Equation 9.3: PCM_CLK Frequency Generated Using the Internal 48MHz Clock
Set the frequency of PCM_SYNC relative to PCM_CLK using Equation 9.4:
f =
PCM_CLK
SYNC_LIMIT × 8
Equation 9.4: PCM_SYNC Frequency Relative to PCM_CLK
CNT_RATE, CNT_LIMIT and SYNC_LIMIT are set using PSKEY_PCM_USE_LOW_JITTER_MODE.
9.3.10 PCM Configuration
Configure the PCM by using PSKEY_PCM_CONFIG32 and PSKEY_PCM_USE_LOW_JITTER_MODE, see your
PS Key file. The default for PSKEY_PCM_CONFIG32 is 0x00800000, i.e. first slot following sync is active, 13-bit
linear voice format, long frame sync and interface master generating 256kHz PCM_CLK from 4MHz internal clock
with no tristate of PCM_OUT.
9.4
Digital Audio Interface (I²S)
The digital audio interface supports the industry standard formats for I²S, left-justified or right-justified. The interface
shares the same pins as the PCM interface, which means each audio bus is mutually exclusive in its usage. Table
9.8 lists these alternative functions. Figure 9.20 shows the timing diagram.
PCM Interface
I²S Interface
PCM_OUT
SD_OUT
PCM_IN
SD_IN
PCM_SYNC
WS
PCM_CLK
SCK
Table 9.8: Alternative Functions of the Digital Audio Bus Interface on the PCM Interface
Configure the digital audio interface using PSKEY_DIGITAL_AUDIO_CONFIG, see the PS Key file.
Advance Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 56 of 110
CS-209182-DSP1
CSR8640 BGA
Data Sheet
