1.2
Pin Configuration
G-
T
W
-00
08090.2.3
VDD_AUX_1V8
VSS_BT_LO_AUX
BT_RF
SPKR_LP
VSS_AUDIO
SPKR _RP
VDD_AUDIO
AU_REF
MIC_AP
MIC_AN
XTAL_OUT
VDD_AUX
VSS_BT_RF
SPKR _LN
VDD_AUDIO_DRV
SPKR _RN
MIC_BP
MIC_BN
MIC_BIAS
LED[2]
XTAL_IN
VDD_ANA_RADIO
PIO[19]
PIO[20]
PIO[15]
AIO[0]
PIO[18]
PIO[21]
PIO[4]
PIO[12]
VDD_PADS_1
VDD_PADS_2
PIO[6]
PIO[8]
PIO[16]
PIO[14]
PIO[10]
VSS_DIG
PIO[0]
PIO[1]
PIO[13]
PIO[11]
PIO[9]
PIO[7]
PIO[2]
PIO[17]
SMPS_1V8_SENSE
USB_P
PIO[5]
LED [0]
RST#
SPI_PCM#
PIO[3]
CHG_EXT
VBAT_SENSE
VSS_SMPS_1V8
3V3_USB
USB_N
LED [1]
VDD_DIG_MEM
VREGIN _DIG
VREGENABLE
VCHG
LX_1V8
VBAT
LX_1V35
VSS_SMPS_1V35
SMPS_1V35_SENSE
1
A
B
C
D
E
F
G
H
J
K
2
3
4
5
6
7
8
9
10
A
B
C
D
E
F
G
H
J
K
1
2
3
4
5
6
7
8
9
10
Figure 1.1: Pin Configuration, Orientation from Top of Device
Advance Information
This material is subject to CSR's non-disclosure agreement
© Cambridge Silicon Radio Limited 2011
Page 14 of 110
CS-209182-DSP1
CSR8640 BGA
Data Sheet