4-13
Since the WDT timing accuracy and ability to
interrupt RF output are verified by the micro-
processor on every power up, there is no need to
recheck these parameters periodically. The only
feature not checked automatically is lockout,
which is extremely reliable due to its simplicity.
If the unit declares a HLP -4 error in RUN
mode, then the timing is incorrect. Select Late
Mode 2 to observe timing of both WDT one-
shot stages at their test points. Stage 1 should go
high for 9 to 11 mS after each WDTSTB, and
Stage 2 should run from 13.5 to 16.5 mS. Slight
timing errors are most likely due to a faulty tim-
ing resistor or capacitor. Failure of the pulses to
respond at all are more indicative of an IC failure.
A HLP -7 indicates that the WDT did not shut
down RF when Stage 2 timed out. This may be
caused by failure of any of the components carry-
ing the WDTFL signal to the WFG and VBASE
circuits.
Most WDT faults can be diagnosed in
Diagnostics 1 using a simple logic probe, but an
oscilloscope will yield better timing measure-
ments. The general health of the WDT can be
confirmed with no instruments simply by observ-
ing the behavior of the MACHINE Alarm Lamp
in the various modes.
4.5.2.2 Pseudo RUN Diagnostics (dI2)
In Diagnostics 2, the unit operates exactly as in
normal RUN mode and will deliver RF to the
output jacks, except software routines which
detect hardware faults are not executed. The rou-
tine that checks for the Program EPROM CRC
validity will still be active.
CAUTION: If any hardware failures exist, the
microprocessor will not shut the system down or
display a HLP code. One should be prudent in
deciding whether or not to enter this mode with-
out first attempting to identify the fault while
powered down.
As an example of the above note, if there is a
problem with the Power Amplifier which causes
it to draw excessive current, say a shorted FET,
then activating the unit can allow the fault current
to flow for the duration of the activation. This
may result in damage to other components which
had previously been spared by the microproces-
sor's fast response to overcurrents in RUN mode.
The time saved by not first performing an ohm-
meter test of the FET will be lost in identifying
and replacing parts damaged by the undetected
overcurrent.
Diagnostics 2 allows the unit to be operated with
the PA collector and base fuses removed, which is
not possible in RUN mode due to the certainty
of a HLP -5 shutdown during initialization.
4.5.3 Base Voltage Generator Troubleshooting
Remove all collector and base fuses on the A4
Power Conversion Assembly before checking a
suspect Base Voltage Generator (BVG). Enter the
dI 2 mode (see Section 4.5.2). Check that
A3U20 is producing the proper VDAC voltage at
TP14. Do this by selecting the Blend 2 Cut mode
and increasing the power setting from 0 to 50W
Monitor TP14 to see that VDAC goes from
approximately 9.9 Vdc at 0W to 2.0 Vdc at 50W.
The VDAC voltage at 50W will vary from unit to
unit, the important factor is that the voltage
changes in small increments.
Next monitor A3TP12 and repeat the above pro-
cedure. Confirm that TP12 voltage increases from
no more than 0.5V at 0W to approximately 5.0V
at 50W. If it fails to do so, check that VSENSE
and ISENS are both less than 0.6V (this is true
only if the PA fuses have been removed).
Other problem sources could be one of the resis-
tor divider chains in the BVG, a bad RFEN or
WDTFL signal. Also check that the other compo-
nents in the BVG chain are correct and function-
al.
If the BVG performs correctly as tested so far,
and the Power Amplifier and Waveform
Generator both test good, proceed with the fol-
lowing test. Turn off the unit and replace the
fuses in the PA. Reenter dI2 and select Blend2.
Monitor A3TP13 (VSENSE) and slowly increase
the power setting on the front panel. When func-
tioning correctly, TP13 will increase with power
setting up to about 5.0 Vdc. At that point, there
should only be a slight increase in TP13 voltage.
If TP13 fails to increase towards 5.0V, do not
Summary of Contents for sabre 180
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