AN201
Rev 1.5 | 82/91
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16 I/O Port
There are 16 GPIO ports in the chip. However, limited by the package size, only 6 IO ports of PORTA<7:0> have pins (except
PA6 and PA5) and PC4 as well as PC6 of PORTC have pins. The others are all inside the chip without pins. In addition to
operating as ordinary input / output port, these IO ports generally have functions to communicate with the peripheral circuits of
the core. See below for details.
16.1 PORTA Port and TRISA Register
PORTA is an 8-bit bi-directional port with TRISA as its corresponding input/output direction register. However, it should be noted
that the 5
th
bit is not in use here because PORTA<5> is a single directional input port. Setting a certain bit in the TRISA register to
1 will set the corresponding PORTA port as input port (the output driver circuit will be disabled accordingly). On the contra ry,
setting a certain bit to 0 will set the corresponding PORTA port as output port. When configured as output port, the output driver
circuit is enabled and the data in the output register will be sent to the output port. Upon reading the PORTA, the PORTA content
will reflect the input port state. Upon writing the PORTA, the PORTA content will be written to the output register. All operations
follow the read-modify-write process, namely the data is read first, then modified, and written to the output register after then.
When MCLRE is 1, the value read from PORTA<5> is 0, which is used as the external reset pin at this time.
16.2 Other Functions of the Port
A state change interrupt option and a weak pull-up option are available for each port of PORTA.
16.2.1 Weak Pull-Up
Each port of PORTA (except for PORTA<5>) has an internal weak pull-up function that can be set individually. Controlling the bit
of the WPUAx register can enable or disable the weak pull-up circuit. When a GPIO is set as output, the weak pull-up circuit is
disabled automatically. The weak pull-up circuit can be disabled during the power-on reset period. This is determined by the
/PAPU bit of the OPTION register. The weak pull-up function is available as well inside PORTA<5>. The weak pull-up function will
be automatically enabled when PORTA<5> is set as /MCLR. When PORTA<5> is set as GPIO, the weak pull-up circuit will be
disabled automatically.
16.2.2 Sate Change Interrupt
Each port of the PORTA can be set as an interrupt source (for state change interrupt) separately. Controlling the bit of the IOCAx
register can enable or disable the interrupts of these ports. The state change interrupt is invalid upon the power-on reset.
When enabling the state change interrupt, the current port level value is compared to the old value of the data register read by the
last reading action. It will perform OR operation on all mismatching results to form an interrupt flag bit. The PAIF flag bit of the
INTCON register can wake up the chip from the sleep state. Users need to execute the following program to clear the flag bit.
1.
Perform a read or write operation to the PORTA to end any mismatched status.
2.
Clear the PAIF flag bit.
The mismatching result will always set the PAIF bit. Reading PORTA once can end any mismatching status to clear the PAIF bit.
The last read value kept in the data register will not be affected by /MCLR or BOR. As long as the mismatching status exists, PAIF
bit will set to 1.
