AN201
Rev 1.5 | 40/91
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4.1.8 PIR1 (Addr:0x0C)
Table 39. PIR1 Register
Name
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
PIR1
EEIF
CKMEAIF
-
C2IF
C1IF
OSFIF
TMR2IF
-
Reset
0
0
-
0
0
0
0
-
Type
RW
RW
-
RW
RW
RW
RW
-
Table 40. PIR1 Bit Function Description
1
INTF
PA2/INT external interrupt flag bit.
1 = PA2/INT external interrupt occurs (must be cleared by software)
0 = PA2/INT external interrupt does not occur
0
PAIF
PORTA change interrupt flag bit.
1 = one or more ports of PORTA<7:0> have state change (must be cleared in software)
0 = none of the PORTA<7:0> has state change
Bit
Name
Function
7
EEIF
EEPROM write operation interrupt flag bit.
1 = EE write operation completes (must be cleared in software)
0 = EE write operation does not complete
6
CKMEAIF
Interrupt flag bit for the operation of fast clock measuring slow clock
1 = the operation of fast clock measuring slow clock completes (must be cleared in software.)
0 = the operation of fast clock measuring slow clock does not complete
5
-
Reserved bit, cannot be written to 1
4
C2IF
Comparator 2 interrupt flag bit.
1 = comparator 2 output changes
0 = comparator2 output does not change
3
C1IF
Comparator 1 interrupt flag bit.
1 = comparator 1 output changes
0 = comparator 1 output does not change
2
OSFIF
Oscillator failure interrupt flag bit.
1 = system oscillator fails and clock input switches to INTOSC (must be cleared by software)
0 = system clock runs normally
1
TMR2IF
Timer 2 and PR2 compare matching interrupt flag bit.
1 = Timer 2 and PR2 matching occurs (must be cleared by software)
0 = Timer 2 and PR2 matching does not occur
0
-
Reserved bit, cannot be written to 1.