AN201
Rev 1.5 | 29/91
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The user needs to query the current operating status by reading the CUS_STATUS (0x4D) status register, of which the lower 4-bit
represents the current operating status. Details are listed in the below table.
Table 26. Operating Status Query Register
Status Register
State Coding
Description
CUS_STATUS
（
0x4D<3:0>
）
0b0000
SLEEP
0b1010
TX
0b1101
STBY
2.9 Hardware Packet Tx Mode
2.9.1 Power-up Initialization
1.
Upon chip power-up, it initializes ports and waits for 20 ms for stabilization.
2.
Control RFCTRL=1.
3.
Configure PC3/CSB, PC2/SCLK and PC0/RFDIN as high resistance input. Configure PC1/SDIO as output 0.
4.
After initialization, the chip can enter low power based sleep state or perform other processing.
2.9.2 Tx Process
The CMT2189B hardware data packet frame structure is shown in the below figure. Please refer to Section 2.7.2 for the data
frame structure descriptions.
Figure 10. CMT2189B Hardware Packet Frame Structure
In this mode, the default value of
key value
is 0 and it cannot be changed by the software. Therefore, it is recommended to set the
length of
key value
to
0
during configuration thus the corresponding key value will not appear in the packet. On the other hand, it
is recommended to use the lowest byte ADDR_ID<7:0> of ID/ADDR as the actual key value with a corresponding register
address 0x10.
