CMOSTEK NextGenRF CMT2189B, User Manual

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AN201
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(0x0F)
Table 10. Relationship between Head/Sync Length Selection and Register
SYNC/HEADER
SYNC_LENGTH <31:24> <23:16> <15:8> <7:0>
0~7
√
8~15
√ √
16~23
√ √ √
24~31
√ √ √ √
In the table, tick indicates a register to be filled. For example, if SYNC_LENGTH is set to 15, that is, the length is 16 symbols and
sync value is 0x5678, then users will fill the value into SYNC_HEADER<31:24> and SYNC_HEADER<23:16> registers. MSB
corresponds to the 31
st
bit and LSB corresponds to the 16
th
bit, that is, 0x56 is filled into SYNC_HEADER<31:24> and 0x78 is
filled into SYNC_ HEADER<23:16>. For users, if the sync enabling bit is 0, a sync is not sent, and if the sync enabling bit is 1, a
sync of 1-32 symbols is sent.
2.7.5 Addr/ID
Table 11. Addr/ID Related Registers
Register
Name
Bits R/W Bit Name Function Description
CUS_PKT13
(0x14)
4:0 RW ADDR_LENGTH<4:0>
The Addr ID length can be configured to 0 ~ 31. 0
represents sending an Addr of 1 logic bit, and so on. 31
represents sending an Addr of 32 logic bits.The logic bit
length is random.
7:5 RW BIT_FORMAT<2:0>
The number of symbol that is contained by 1 logic bit can
be configured to 0 ~ 7. 0 represents 1 symbol and so on.
7 represents 8 symbols.
CUS_PKT15
(0x16)
7:0 RW BIT_LOGIC_L<7:0> Logic 0 definition
CUS_PKT16
(0x17)
7:0 RW BIT_LOGIC_H<7:0> Logic 1definition
CUS_PKT9
(0x10)
7:0 RW ADDR_ID<7:0>
Addr ID value
CUS_PKT10
(0x11)
7:0 RW ADDR_ID<15:8>
CUS_PKT11
(0x12)
7:0 RW ADDR_ID<23:16>
CUS_PKT12
(0x13)
7:0 RW ADDR_ID<31:24>