2/24/2008 9T6WP
BCM7405
Preliminary Hardware Data Module
Functional Description
06/29/07
Bro a d c o m C o rp o r a ti o n
Page 1-80
Peripherals
Document
7405-1HDM00-R
PWM
S
The BCM7405 contains two PWM Generators. The output of each generator can come from a variable-frequency PWM
(VFPWM) or a constant-frequence PWM (CFPWM). The VFPWM is clocked by a 27-MHz clock while the CFPWM is clocked
by the output of the VFPWM. Each generator output driver can be configured to one of two topologies: totem-pole or open-
drain.
shows a diagram of the variable-frequency PWM generators. The accumulator is reset to 0 out of system reset.
No PWM waveforms are generated while the pwm_start bit is low. If the pwm_force_high bit is set to 1, the least significant
16 bits of the accumulator are loaded with the contents of the frequency control word. Simultaneously, the most significant
bit of the accumulator is set to 1, causing the PWM output to go high. If the pwm_force_high bit is not set, but the pwm_start
bit is set to 0, the accumulator is forced to 0. If the pwm_force_high bit is set to 0 and the pwm_start bit is set to 1, then
automatic PWM waveform generation occurs. The PWM output is connected directly to the most significant bit of the
accumulator. During normal operation, the PWM output reflects the state of the accumulator’s carry-out position.
Figure 1-24: Variable-Frequency PWM Generation Diagram
T
IMER
/C
OUNTERS
There are four programmable timers available inside the BCM7405 chip. These can be used in either countdown modes to
trigger internal interrupts in free-run option to allow software to track elapsed time. Each counter is clocked by the 27-MHz
clock. Each counter is 30-bits wide, which allows a time constant of approximately 39.7s.
A watchdog timer is also included. This is a countdown only counter that forces a chip reset or non-maskable interrupt to
occur.
S
MART
C
ARD
I
NTERFACES
The BCM7405 has two identical and independent Smart Card interfaces. Each interface has an ISO 7816 UART with a 16-
character deep receive FIFO, automatic convention processing, variable baud rate, automatic error management at the
character level, and automatic insertion of extra guard time. Each interface also has pins for controlling the card VCC and
RST, and a pin for card presence. These interfaces are intended to work in conjunction with a Philips TDA8001/8002 or
similar external IC card coupler chip to handle the voltage and protection requirements.
Frequency Control Word
Accumulator
+
Bit
15
Bit
0
Bit
16
1'b
1
PWM Waveform Output
