PT-6IL
MAINBOARD
HARDWARE SETUP
15
PT-6IL mainboard has the new technology called SPD (Serial Presence Detect)
designed in the DRAM subsystem. SPD will be available in the future and it is designed
to make system more stabile and compatible. If the DIMM module with this technology
is populated on the mainboard, the system BIOS will gather some information (such as
DRAM type, size, access timing ... etc.) stored in the DIMM module and then BIOS
will determine what operating parameters will be used for the individual populated
DIMM module automatically.
Picture of DIMM module
In order to increase of the system performance, two suggestions are recommended when
you are installing the DIMM modules :
1.
Always install DIMM module starting from DIMM 1 socket first, and then DIMM
2 and then DIMM 3.
2.
Avoid populating EDO DIMM module and SDRAM DIMM module on the
mainboard at the same time.
In the DRAM subsystem, ECC feature can be used to checked on the DRAM interface
and make sure the data transmission is correct ( this feature can be selected in the BIOS
CMOS setup, please refer to page 4-6 for the BIOS setting, the default status is Non-
ECC selected.) Before you enable the ECC checking feature, please make sure that all
DIMM modules have the true
parity bit
.
The ECC is an optional data integrity feature provided by the mainboard and the
processor. This feature provides single-bit error correction, multiple-bit error detection,
and detection of all errors confined to single nibble for DRAM memory subsystem.
