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The following figure illustrates the default placement of the jumpers installed on the Spartan-3E Evaluation Board.
DB9
RS232
USB
+5V
IN
LEDs
Par-IV Prog
Dip
Switches
6
TDI
TDO
TCK
TMS
GND
100
MHz
6
JP8
JP9
J1
J6
JP2
JP3
JP7
J4
U11
TI
TP2
TP3
TP1
3.3V
2.5V
1.2V
Texas Instruments
TPS75003
D
ESIG
N
SER
V
IC
ES
el
ectr
on
ics
ma
rk
eti
ng
JP5
J5
U10
U3
JP1 JP4
SW1
SW2
SW3
J3
JR
1
FPGA Reconfig
SPI
Flash
RS232
U9
Xilinx
XC3S100E
FPGA
Cypress
USB 2.0
Fly-Wire
Programming
General Purpose I/O Header
JP6
U1
U2
Figure 9 - Default Jumper Placement
JTx Resistor Jumpers –
Additional flexibility has been designed into the circuit in the form of resistor jumpers “JTx” and series resistors that can be
moved or removed to alter the functionality of the board. The purpose of some of these components may be discussed in other
sections of this manual others may not be discussed at all. The position of these components should not be altered without
careful review of the schematics and associated component data sheets to prevent damage to the board.
2.7 Clocks
The Spartan-3E Evaluation Board uses a 100MHz system clock. If other frequencies are desired, a DCM may be used in the
FPGA to obtain the target frequency.
Freq
GCLK Input
FPGA pin#
Notes
100MHz
YES
P129
Use internal DCM to obtain other frequencies.
Table 6 - Available GCLK Sources
2.8 On-board Display (2 Character Alphanumeric LED)
Manufacturer: Lite-On
Part #: LTP-3786E-03