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Tables
Table 1 - Ordering Information ................................................................................................................................................................... 6
Table 2 - Spartan-3E Attributes by Density ................................................................................................................................................ 7
Table 3 - FPGA Configuration from PROM/JTAG … Jumper Setting......................................................................................................... 8
Table 4 - JTAG Headers (Par-3 & Par-4) Pin-Out ...................................................................................................................................... 8
Table 5 - J6 Header (SPI) Pin-out ............................................................................................................................................................ 11
Table 6 - Available GCLK Sources ........................................................................................................................................................... 15
Table 7 - Ethernet PHY Modes................................................................................................................................................................. 16
Table 8 - DIP switch FPGA Pin-out .......................................................................................................................................................... 16
Table 9 - Push button FPGA Pin-out ........................................................................................................................................................ 16
Table 10 - LED FPGA Pin-out .................................................................................................................................................................. 17
Table 11 - SPI FPGA Pin-out ................................................................................................................................................................... 17
Table 12 - RS-232 FPGA Pin-out ............................................................................................................................................................. 18
Table 13 - RS-232 Connector Pin-out ...................................................................................................................................................... 18
Table 14 - USB Interface FPGA Pin-out ................................................................................................................................................... 20
Table 15 - Header "J1" Pin-out................................................................................................................................................................. 21
