Copyright © 2005 Avnet, Inc. AVNET and the AV logo are registered trademarks of Avnet, Inc. All other brands are property of their respective owners.
Avnet Electronics Marketing
11 of 23
Rev 1.0 06/14/2006
Released
Literature
#
ADS-005604
The primary purpose of the SPI FLASH on this board is to store the configuration file for the FPGA but the unused portion of
the FLASH, or the entire FLASH if an alternate configuration method is used, can be used to store user data or code require by
the FPGA application.
The programming methods below can be used to write configuration and/or data to the device.
** NOTE**
JP8 provides write protection for the SPI FLASH device so this shunt must be removed before programming.
External Programming
There are many programmers on the market which are capable of programming the SPI device. To program the device with
this method, it would likely require the device be removed from the PCB. While external programming may be ideal for a
production environment prior to mounting the components, it is obviously not for development. Thus a method of in-circuit
programming is desirable.
In-Circuit Programming
In-Circuit programming of the SPI FLASH can be accomplished on this board from a host PCI via USB with the provided utility
or with an external controller via the interface provided by the header “J6”.
Programming via USB
The Avnet USB utility may be used to write data to the SPI Flash device. The Avnet USB utility will accept a HEX file as
an input and program it into the SPI Flash. The HEX is actually an ASCII file, so there is a conversion going on in the
background which is transparent to the user. For additional information on the Avnet USB utility, please see the included
documentation.
Programming with J6
The SPI Flash pins have been made available at J6. This will allow the user to program the part via an external custom
method. It may be necessary when programming the SPI in this mode to place a shunt on JP9 to hold the Spartan3E
PROG# pin low tri-stating the FPGA pins to avoid contention on the programming signals. The pinout for J6 is given in the
following table.
J6 pin
Net name
SPI Function
FPGA Pin
1 VCC
(3.3V)
VCC
-
2 FPGA_CS#
CS# P39
3 DIN
MISO
P63
5 FPGA_CCLK
CLK
P71
4 FPGA_MOSI
MOSI P44
6 GND
GND -
Table 5 - J6 Header (SPI) Pin-out
This method of programming is allowed but it is not supported by Avnet.
Programming with FPGA
Since the configuration pins of the FPGA are available as I/O, the user could create IP to read/write the SPI Flash. At the
time of this publication, an example project for doing so was not available. The task of creating such a project is left to the
user. Check with your local Avnet FAE to see if such projects or cores are currently available through Avnet or Xilinx.
2.5 Avnet USB Utility
The Avnet USB Utility may be used to configure the FPGA and program the SPI Flash memory as mentioned in the previous
section. This section will describe the basic operation of the Avnet USB utility; more detailed information is available in the
utility user manual. Whether configuring the FPGA or programming the FLASH make sure that the BIT file is configured with
the startup clock set to CCLK and that there is a shunt on JP4 enabling the USB controller to drive the CCLK signal.
The following instructions and screen shot are an overview of the procedure. They assume that the driver and utility version
3.0 or later has been properly installed. Consult the USB Utility User Manual as needed for this procedure.
1. Connect a USB cable from the host PC to the Spartan3E Evaluation board.
Note:
The board will draw its power from the USB port, so there is no need to apply power to the optional
barrel power input.
2.
Wait!
It will take a few seconds to scan the USB bus and show the available Avnet Boards
