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ANTAIOS 

Evaluation Kit 

User Guide  

PAAE1000/1001 | Revision 1.03

 

Summary of Contents for ANTAIOS

Page 1: ...ANTAIOS Evaluation Kit User Guide PAAE1000 1001 Revision 1 03...

Page 2: ...tested periodically however Required corrections are included in subsequent versions We gratefully accept suggestions for improvements Copyright Copyright YASKAWA Europe GmbH 2019 All Rights Reserved...

Page 3: ...for Gigabit and external MII X16 X17 X18 13 4 5 PortC VPC UART CAN PBM and GPIO X55 X56 14 4 6 PortD Asynchronous External Interface AEI GPIOs UART and TechIO 15 4 7 I2C 15 4 8 UART 1 2 and USB to ser...

Page 4: ...ctors X17 and X18 14 Figure 4 6 PortC box header X55 and X56 15 Figure 4 7 I C channel selector 15 Figure 4 8 SPI0 CS selector 16 Figure 4 9 SPI master slave selector 17 Figure 4 10 PortA debug connec...

Page 5: ...Revision 1 03 5 28 Copyright YASKAWA Europe GmbH 2019 List of Tables Table 3 1 Coreboard test pads 11 Table 4 1 UART2 to connector configuration 16 Table 4 2 Test pads mainboard 17 Table 6 1 Order In...

Page 6: ...on Kit Revision 1 03 6 28 Copyright YASKAWA Europe GmbH 2019 1 Evaluation Kit Contents 1x Evaluation board with extension PCBs 1x LP5483 external GigaBit Phy 1x LP5481 technology IO 1x Debug PCB LP596...

Page 7: ...h all external interfaces switches LEDs jumpers and power supply powered by 24V DC The coreboard with the ANTAIOS ASIC itself DDR2 Ram and JTAG ETM interface Figure 2 1 Mainboard PortC PortB Power Swi...

Page 8: ...2 Coreboard The coreboard is plugged onto the mainboard using the connectors X27 and X33 To ensure the mechanical connection the coreboard is additionally fixed with two screws The functionality of t...

Page 9: ...M DDR 2 memory chip is assembled on the coreboard The usable memory is 64MByte of DDR2 SDRAM For debugging the DDR2 interface the contactless debug interface Keysight Soft Touch E5394A is supported on...

Page 10: ...connector can be used to trace the program and data flow The trace clock frequency is 144MHz Figure 3 2 ETM connector X4 PortE Debug Connector X3 3 5 PortE of ANTAIOS can be used to extend the ETM tr...

Page 11: ...11 28 Copyright YASKAWA Europe GmbH 2019 Figure 3 3 PortE debug connector X3 Test Pads 3 6 Table 3 1 Coreboard test pads Pad Description P1 TEST3 P2 DDR_VREF P3 PGOOD_VTT P4 DDR_VTT P5 TEST0 P6 1V2 A...

Page 12: ...supports booting from QSPI flash NAND flash 16 bit parallel interface AEI and I C EEPROM The boot source can be selected by setting appropriate jumpers to connector X19 Figure 4 2 Bootsource selector...

Page 13: ...MII X16 X17 X18 The shared interfaces of ANTAIOS like external MII and GMII are accessible through various extension PCBs connected to mictor connectors Using only X16 the internal gigabit MAC can be...

Page 14: ...the extension PCB version 5483A V10 The TechIO functionality of PortB_v4 can be used by connecting the TechIO extension PCB LP5484 to X17 and X18 If the internal PHYs of ANTAIOS are not used up to thr...

Page 15: ...ddress range of up to 2Mbyte using the asynchronous external interface AEI and two chip selects CS0 and CS1 CS0 Used in master mode to connect to slave board e g another Antaios evaluation board with...

Page 16: ...umper X72 selects if UART1 uses the SUBD or USB debug connector When X72 is left open UART1 is driven to the SUBD connector X79 If X72 is shortened the communication is done using the USB debug connec...

Page 17: ...1 X30 X50 4 10 Table 4 2 Test pads mainboard Pad Description P1 TX2 P2 TX2 P3 TX1 P4 TX1 P5 RX2 P6 RX2 P7 RX1 P8 RX1 P9 Slicebus NDLI P10 GND P11 Slicebus ALARM P12 GND P13 Slicebus MDLO P14 GND P15 3...

Page 18: ...A Europe GmbH 2019 All 15 signals of PortA are driven to debug connector X31 the SD card signals are additionally connected to X30 Figure 4 10 PortA debug connector X30 and X31 All eight signals of Po...

Page 19: ...ectors X27 X33 4 11 The ANTAIOS coreboard is connected to the board to board connectors X27 and X33 and must be secured with two screws Figure 4 12 Board to board connectors X27 and X33 Boundary Scan...

Page 20: ...stal oscillator as 32MHz clock source for the ANTAIOS asic Figure 4 13 Crystal oscillator Q1 as 32MHz clock source Please note that the use of programmable crystal oscillators will induce a considerab...

Page 21: ...on 1 03 21 28 Copyright YASKAWA Europe GmbH 2019 5 Extension PCBs LP5480 ExtPHY_TI 5 1 Extension PCB for PortB_v1 with TI TLK106L 10 100mbit PHY Figure 5 1 Extension PCB LP5480 LP5481 TechIO_Dv4 5 2 E...

Page 22: ...000 1001 Evaluation Kit Revision 1 03 22 28 Copyright YASKAWA Europe GmbH 2019 Figure 5 2 Extension PCB LP5481 LP5482 SerialD 5 3 Extension PCB for PortD_v3 for GPIOs UART2 VPC and CAN 1 2 Figure 5 3...

Page 23: ...PortB_v2 3 with Marvell 88E1119R 10 100 1000mbit PHY For proper operation pins 2 and 3 of jumper X14 must be shortened Figure 5 4 Extension PCB LP5483 LP5484 TechIO_Bv4 5 5 Extension PCB for PortB_v4...

Page 24: ...yright YASKAWA Europe GmbH 2019 Figure 5 6 Extension PCB LP5485 LP5486 ExtPHY_BC 5 7 Extension PCB for PortB_v1 with Broadcom BCM5241A1IMLG 10 100mbit PHY Figure 5 7 Extension PCB LP5486 LP5487 BroadR...

Page 25: ...ent versions of the mictor PCB 1 2 and 3 which differ in the placement and orientation of the mictor connector and header pins The left part of Figure 5 8 shows the various locations of the 8x 10 pin...

Page 26: ...15x15mm PAAE1000 LP5999 ANT1001 ANTAIOS Coreboard BGA 19x19mm PAAE1001 LP5480 External PHY TI TLK106L B_v1 PAAE1150 LP5481 TechIO D_v4 PAAE1151 LP5482 UART GPIOs CAN D_v3 PAAE1152 LP5483 External GBi...

Page 27: ...ersion V0 02 17 11 2016 Changed to new template V0 03 22 12 2016 Renamed to PAAE1100 1101 Evaluation Kit V0 04 23 12 2016 Added note about virtual COM port mapping when using the onboard serial to USB...

Page 28: ...E1000 1001 Evaluation Kit Revision 1 03 28 28 Copyright YASKAWA Europe GmbH 2019 YASKAWA Europe GmbH Ohmstr 4 91074 Herzogenaurach Germany Phone 49 0 9132 744 200 E Mail support profichip yaskawa eu c...

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