36
ATtiny26(L)
1477G–AVR–03/05
Power Management
and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the four sleep modes, the SE bit in MCUCR must be written to logic one
and a SLEEP instruction must be executed. The SM1, and SM0 bits in the MCUCR
Register select which sleep mode (Idle, ADC Noise Reduction, Power Down, or Stand-
by) will be activated by the SLEEP instruction. See Table 17 for a summary. If an
enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The
MCU is then halted for four cycles in addition to the start-up time, it executes the inter-
rupt routine, and resumes execution from the instruction following SLEEP. The contents
of the Register File and SRAM are unaltered when the device wakes up from sleep. If a
Reset occurs during sleep mode, the MCU wakes up and executes from the Reset
Vector.
Table 19 on page 38 presents the different clock systems in the ATtiny26, and their dis-
tribution. The figure is helpful in selecting an appropriate sleep mode.
MCU Control Register –
MCUCR
The MCU Control Register contains control bits for general MCU functions.
• Bits 7 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny26(L) and always reads as zero.
• Bit 6 – PUD: Pull-up Disable
When this bit is set (one), the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
“Configuring the Pin” on page 42 for more details about this feature.
• Bit 5 – SE: Sleep Enable
The SE bit must be set (one) to make the MCU enter the Sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the Sleep mode unless it is the pro-
grammers purpose, it is recommended to set the Sleep Enable SE bit just before the
execution of the SLEEP instruction.
• Bits 4,3 – SM1/SM0: Sleep Mode Select Bits 1 and 0
These bits select between the four available Sleep modes, as shown in the following
table.
For details, refer to the paragraph “Sleep Modes” below.
• Bit 2 – Res: Reserved Bit
This bit is a reserved bit in the ATtiny26(L) and always reads as zero.
Bit
7
6
5
4
3
2
1
0
$35 ($55)
–
PUD
SE
SM1
SM0
–
ISC01
ISC00
MCUCR
Read/Write
R
R/W
R/W
R/W
R/W
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
Table 17. Sleep Modes
SM1
SM0
Sleep Mode
0
0
Idle mode
0
1
ADC Noise Reduction mode
1
0
Power-down mode
1
1
Standby mode
