87
ATtiny26(L)
1477G–AVR–03/05
The following code demonstrates how to use the USI module as a SPI Master with max-
imum speed (fsck = fck/2):
SPITransfer_Fast:
out USIDR,r16
ldi r16,(1<<(0<<(1<<USITC)
ldi r17,(1<<(0<<(1<<USITC)+(1<<USICLK)
out
USICR,r16 ; MSB
out USICR,r17
out
USICR,r16
out USICR,r17
out USICR,r16
out USICR,r17
out USICR,r16
out USICR,r17
out USICR,r16
out USICR,r17
out USICR,r16
out USICR,r17
out USICR,r16
out USICR,r17
out
USICR,r16 ; LSB
out USICR,r17
in r16,USIDR
ret
SPI Slave Operation Example
The following code demonstrates how to use the USI module as a SPI slave:
init:
ldi
r16,(1<<(1<<USICS1)
out
USICR,r16
...
SlaveSPITransfer:
out
USIDR,r16
ldi
r16,(1<<USIOIF)
out
USISR,r16
SlaveSPITransfer_loop:
sbis
USISR,USIOIF
rjmp
SlaveSPITransfer_loop
in
r16,USIDR
ret
The code is size optimized using only 8 instructions (+ ret). The code example assumes
that the DO is configured as output and SCK pin is configured as input in the DDRB
Register. The value stored in register r16 prior to the function is called is transferred to
