Asus RS500-E9 Series, User Manual, Page: 98 / 166

5-20 Chapter 5: BIOS Setup
PCI Express GEN2 Device Register Settings
Target Link Speed [Auto]
If supported by hardware and set to Force to X.X GT/s , for Downstream Ports, this
sets an upper limit on Link operational speed by restricting the values advertised by the
Upstream component in its training sequences. When Auto is selected HW initialized
data will be used.
Configuration options: [Auto] [Force to 2.5 GT/s] [Force to 5.0 GT/s] [Force to 8.0 GT/s]
Clock Power Management [Disabled]
If supported by hardware and set to Enabled , the device is permitted to use CLKREQ#
signal for power management of Link clock in accordance to protocol defined in
appropriate form factor specification.
Configuration options: [Disabled] [Enabled]
Compliance SOS [Disabled]
If supported by hardware and set to Enabled , this will force LTSSM to send SKP
Ordered Sets between sequences when sending Compliance Pattern or Modified
Compliance Pattern.
Configuration options: [Disabled] [Enabled]
Hardware Autonomous Width [Enabled]
If supported by hardware and set to Disabled , this will disable the hardware’s ability to
change link width except for width size reduction for the purpose of correcting unstable
link operation.
Configuration options: [Disabled] [Enabled]
Hardware Autonomous Speed [Enabled]
If supported by hardware and set to Disabled , this will disable the hardware’s ability
to change link speed except for speed rate reduction for the purpose of correcting
unstable link operation.
Configuration options: [Disabled] [Enabled]
PCIE OPROM Slot Options
PCIE6 Slot OpROM [Enabled]
This option allows you to enable or disable the OpROM of the PCIe slot.
Configuration options: [Disabled] [Enabled]
MEZZ1 Slot OpROM [Enabled]
This option allows you to enable or disable the OpROM of the MEZZ1 slot.
Configuration options: [Disabled] [Enabled]