[AKD4671-B]
<KM089001>
2008
/
03
-
20
-
(2) PLLBT reference clock: SYNCB or BICKB pin
The PLLBT circuit generates the required clock for PCM I/F from SYNCB or BICKB. Generated clocks are output
via SYNCA and BICKA pins.
AK4671
Baseband Module
BICKA
SDTOA
SDTIA
SYNCB
SDTI
SDTO
SYNC
SYNCA
1fs2
16fs2 or 32fs2
BICK
BICKB
SDTOB
SDTIB
SDTI
SDTO
1fs2
≥
16fs2
BICK
SYNC
Bluetooth Module
(PLLBT Reference Clock: SYNCB or BICKB pin)
(2-1)
SYNCB and BICKB are fed from on-board clock generator.
X1 (X’tal), PORT3 (Baseband Module) and PORT6 (Bluetooth Module) are used.
The jumper pins should be set as the following.
Please set JP42 (BCFS2) to the required frequency. Follows are setting in BICKB=32fs.
When clocks are supplied from J13 (EXT1) without using X1, JP41 (MCLK2) should be set to “EXT1”.
JP62
BICKA
JP63
SYNCA
JP64
BICKB
JP65
SYNCB
JP61
SDTIB
JP60
SDTIA
JP41
MCLK2
XTL
EXT1
JP43
BICK2_SEL
BICKB
BICKA
JP40
XTE
JP42
BCFS2
JP49
PLLBT
BICKB
BICKA
256fs2
128fs2
64fs2
32fs2
16fs2
JP45
LRCK2_SEL
LRCKB
LRCKA
