[AKD4671-B]
<KM089001>
2008
/
03
-
13
-
(3-2) PLL Reference Clock : BICK or LRCK pin
AK4671
DSP or
μ
P
MCKI
BICK
LRCK
SDTO
SDTI
BCLK
LRCK
SDTI
SDTO
MCKO
1fs
32fs or 64fs
(PLL Reference Clock: BICK pin)
AK4671
DSP or
μ
P
MCKI
BICK
LRCK
SDTO
SDTI
BCLK
LRCK
SDTI
SDTO
MCKO
1fs
≥
32fs
(PLL Reference Clock: LRCK pin)
(3-2-1)
Evaluation of A/D using DIT of AK4114
X2 (X’tal) and PORT2 (DIT) are used. Nothing should be connected to PORT1 (DIR) and PORT4 (DSP).
The jumper pins should be set as the following.
JP36
MCLK
JP33
BICK_SEL
4040
DIR
DIR
EXT
JP38
LRCK_SEL
4040
DIR
JP39
EXT
JP46
4114_MCKI
JP35
PHASE
INV
THR
JP48
M/S
Slave
Master
