Analog Devices VISUALDSP++ 3.5, Manual

Page: 55 / 166

Vi+ Loader Manual 2-25
for 16-Bit Processors
Blackfin Processor Loader/Splitter
ADSP-BF531/BF532/BF533 Processor Memory Ranges
The on-chip boot ROM on ADSP-BF531, ADSP-BF532, and
ADSP-BF533 Blackfin processors allows booting to the following memory
ranges.
• L1 memory
• ADSP-BF531 processor
"
Data Bank A SRAM (
0xFF80 4000
–
0xFF80 7FFF
)
"
Instruction SRAM (
0xFFA0 8000
–
FFA0 BFFF
)
• ADSP-BF532 processor
"
Data Bank A SRAM (
0xFF80 4000
–
0xFF80 7FFF
)
"
Data Bank B SRAM (0
xFF90 4000
–
0xFF90 7FFF
)
"
Instruction SRAM (0
xFFA0 8000
–
FFA1 3FFF
)
• ADSP-BF533 processor
"
Data Bank A SRAM (
0xFF80 0000
–
0xFF80 7FFF)
"
Data Bank B SRAM (
0xFF90 000
–
0xFF90 7FFF)
"
Instruction SRAM (
0xFFA0 0000
–
FFA1 3FFF
)
• SDRAM memory
"
Bank 0 (
0x0000 0000
–
0x07FF FFFF
)
!
Booting to scratchpad memory (
0xFFB0 0000
) is not supported.
!
SDRAM must be initialized by user code before any instructions or
data are loaded into it.