Vi+ Loader Manual
2-53
for 16-Bit Processors
Blackfin Processor Loader/Splitter
0x2000 0000
becomes
0x0000 0000
. The valid numbers are integers
0
through
32
but, based on your specific input file, the value can be within a
subset of [
0
,
32
].
No-boot Mode
The hardware settings of
BMODE = 000
for ADSP-BF535 processors or
BMODE = 00
for ADSP-BF531, ADSP-BF532, and ADSP-BF533 proces-
sors select the no-boot option. In this mode of operation, the on-chip
boot kernel is bypassed after reset and the processor starts fetching and
executing instructions from address
0x2000 0000
in the Asynchronous
Memory Bank 0. The processor assumes 16-bit memory with valid
instructions at that location.
To create a proper
.LDR
file that can be burned into either a parallel Flash
or EPROM device, you must modify the standard LDF file in order the
reset vector is to be located accordingly. The following code fragments
illustrate the required modifications in case of an ADSP-BF533 processor.
Listing 2-3. Section Assignment (LDF File)
MEMORY
{
/* Off-chip Instruction ROM in Async Bank 0 */
MEM_PROGRAM_ROM { TYPE(ROM) START(0x20000000) END(0x2009FFFF)
WIDTH(8) }
/* Off-chip constant data in Async Bank 0 */
MEM_DATA_ROM
{ TYPE(ROM) START(0x200A0000) END(0x200FFFFF)
WIDTH(8) }
/* On-chip SRAM data, is not booted automatically */
MEM_DATA_RAM
{ TYPE(RAM) START(0xFF903000) END(0xFF907FFF)
WIDTH(8) }
Summary of Contents for VISUALDSP++ 3.5
Page 9: ...VisualDSP 3 5 Loader Manual ix for 16 Bit Processors Contents INDEX ...
Page 10: ...x VisualDSP 3 5 Loader Manual for 16 Bit Processors ...
Page 20: ...Notation Conventions xx VisualDSP Loader Manual for 16 Bit Processors ...
Page 86: ...Blackfin Processor Loader Guide 2 56 VisualDSP Loader Manual for 16 Bit Processors ...
Page 144: ...ADSP 218x DSP Splitter Guide 5 20 VisualDSP 3 5 Loader Manual for 16 Bit Processors ...
Page 166: ...INDEX I 12 VisualDSP Loader Manual for 16 Bit Processors ...