Analog Devices VISUALDSP++ 3.5, Manual

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Blackfin Processor Booting
2-26 Vi+ Loader Manual
for 16-Bit Processors
ADSP-BF531/BF532/BF533 Processor SPl Memory Boot Se-
quence
The ADSP-BF531/BF532/BF533 processors support booting from 8-,
16-, or 24-bit addressable SPI memories (
BMODE = 11
).
To determine the memory type connected to the processor (8-, 16-, or
24-bit), the processor sends signals to the SPI memory until it responds
back. The SPI memory does not respond back until it is properly
addressed.
The on-chip boot ROM does the following.
1. Sends a
READ
command,
0x03
, then does a dummy
READ
.
2. Sends an address byte,
0x00
, then does a dummy
READ
.
3. Sends another byte,
0x00
, and verifies if the incoming byte is a
zero. If the byte is a zero, an 8-bit addressable SPI memory device
is connected.
4. If the incoming byte is not a zero, the on-chip boot ROM sends
another byte,
0x00
, and verifies if the incoming byte is a zero. If the
byte is a zero, a 16-bit addressable SPI memory device is
connected.
5. If the incoming byte is not a zero, the on-chip boot ROM sends
another byte,
0x00
, and verifies if the incoming byte is a zero. The
last byte is a zero when a 24-bit addressable SPI memory device is
connected.