Analog Devices VISUALDSP++ 3.5, Manual

Page: 65 / 166

Vi+ Loader Manual 2-35
for 16-Bit Processors
Blackfin Processor Loader/Splitter
#
The boot ROM does not support booting to core A scratch mem-
ory (
0xFFB0 0000
–
0xFFB0 0FFF
) and to core B scratch memory
(
0xFF70 0000
–
0xFF70 0FFF
). Data that needs to be initialized prior
to runtime should not be placed in scratch memory.
ADSP-BF561 Processor Initialization Blocks
An initialization block or a second-stage loader must be used to initialize
the SDRAM memory of the ADSP-BF561 processor before any instruc-
tions or data are loaded into it.
The initialization block is identified by a bit in the flag word of the
10-byte block header. When the boot ROM encounters an initialization
block in the boot stream, it loads the block and executes it immediately.
The initialization block must save and restore registers and return to the
boot ROM, so the boot ROM can load the rest of the blocks. For more
details, see
“Flags of Block Header” on page 2-20 .
Both the initialization block and second stage loader can be used to force
the boot ROM to load a specific
.DXE
from the external memory device if
the boot ROM stores multiple executable files. The initialization block
can manipulate the
R0
or
R3
register, which the boot ROM uses as external
memory pointers for Flash/PROM or SPI memory boot, respectively.
After the processor returns from the initialization block, the boot ROM
continues to load blocks from the location specified in the
R0
or
R3
regis-
ter, which can be any
.DXE
in the boot stream. This option requires the
starting locations of specific executables within external memory. The
R0
or
R3
register must point to the 10-byte count header, as illustrated in
“ADSP-BF531/BF532/BF533 and ADSP-BF561 Multiple .DXE Boot-
ing” on page 2-37
.