Analog Devices VISUALDSP++ 3.5, Manual, Page: 57 / 166

Vi+ Loader Manual 2-27
for 16-Bit Processors
Blackfin Processor Loader/Splitter
The
MISO
line must be pulled high for
BMODE = 11
. Since the
MISO
line is
pulled up high, the processor receives one of the following.
• A
0xFF
if the part is not responding back with valid data
• A
0x00
if the part is responding back with valid data.
!
The boot uses Slave Select 2 that maps to
PF2
. The on-chip boot
ROM sets the
Baud Rate
register to “
133
”, which, based on a
133 MHz system clock, results in a 133 MHz/(2*133) = 500 kHz
baud rate.
Analog Devices recommends the following SPI memory devices.
• 8-bit addressable SPI memory: 25LC040 from Microchip
(
http://www.microchip.com/download/lit/pline/mem-
ory/spi/21204c.pdf
)
• 16-bit addressable SPI memory: 25CL640 from Microchip
(
http://www.microchip.com/download/lit/pline/mem-
ory/spi/21223e.pdf
)
• 24-bit addressable SPI memory: M25P80 from STMicroelectronics
(
http://www.st.com/stonline/books/pdf/docs/8495.pdf
)