MIC-3393 User Manual
72
C.3.2
Program Watchdog
Name:
WDG_EN
Address-Offset:
0x08
H8 Address:
0xFFC008
LPC Address:
0x443
Name:
WDG_disable
Address-Offset:
na
H8 Address:
na
LPC Address:
0x444
Bit Position
Mnemonic
Description
R/W (Type)
Default 0x
H8
LPC
7 : 0
WDG
watch dog timer value
RO
RW
0xFF
Bit Position
Mnemonic
Description
R/W (Type)
Default 0x
H8
LPC
7 : 0
WDG
watch dog timer value
na
RO
0x0
Summary of Contents for MIC-3393
Page 1: ...User Manual MIC 3393 6U CompactPCI Intel Xeon Quad Dual Core Processor Blade...
Page 11: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3393 hardware...
Page 33: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...
Page 54: ...MIC 3393 User Manual 44 2 8 Advanced Chipset Settings Figure 2 22 Advanced chipset settings...
Page 59: ...Chapter 3 3 IPMI for the MIC 3393 This chapter describes IPMI con figuration for the MIC 3393...
Page 67: ...Appendix A A Pin Assignments This appendix describes pin assignments...
Page 75: ...Appendix C C FPGA This appendix describes FPGA configuration...
Page 83: ...Appendix D D Glossary...