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MIC-3393 User Manual
66
C.1
Features
!
Drone Mode
!
Hot-Swap: Hot insertion and removal control
!
CompactPCI Backplane: CompactPCI slot Addressing
!
LPC Bus: Provide LPC Bus access
!
Watchdog
!
Debug Message: Boot time POST message
C.2
FPGA I/O Registers
The Advantech MIC-3393 FPGA communicates with main I/O spaces. The LPC unit
is used to interconnect the Intel ICH9R LPC signals. The Debug Port Unit is used to
decode POST codes. The Hot-Swap Out-Of-Service LED Control Unit is used to con-
trol the blue LED during Hot-Insert and Hot-Remove. The Drone Mode Unit is used to
disable the CPCI bridge. The other signals in the Miscellaneous Unit are for interfac-
ing with corresponding I/O interface signals.
C.2.1
Debug Message
Table C.1: LPC I/O registers address
LPC Address
I/O Type
Description
0x 80h
W
Port 80 Display
0x 441h
RW
Control Signal
0x 443h / 0x 444h
RW
Watchdog Register
0x 445h
R
FPGA revision
0x 446h
RW
Firmware Hub ID Signal
0x 447h
R
Geography Address (GA)
0x 449h
RW
SOL Function
Table C.2: Debug_Code [7:0] (LPC I/O address: 80H)
Bits
Name
Default State Valid State Read Only Function
7 ~ 0 Debug code xxh
0 ~ FFh
Show debug code from Port 80h. Bit 7
(MSB)...0 (LSB) is mapped to LED7...0
Summary of Contents for MIC-3393
Page 1: ...User Manual MIC 3393 6U CompactPCI Intel Xeon Quad Dual Core Processor Blade...
Page 11: ...Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC 3393 hardware...
Page 33: ...Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS...
Page 54: ...MIC 3393 User Manual 44 2 8 Advanced Chipset Settings Figure 2 22 Advanced chipset settings...
Page 59: ...Chapter 3 3 IPMI for the MIC 3393 This chapter describes IPMI con figuration for the MIC 3393...
Page 67: ...Appendix A A Pin Assignments This appendix describes pin assignments...
Page 75: ...Appendix C C FPGA This appendix describes FPGA configuration...
Page 83: ...Appendix D D Glossary...