Actel ProASIC3/E, User Manual, Page: 46 / 106

Quick Start Tutorial
46 ProASIC3/E Starter Kit User’s Guide and Tutorial
4. Click and drag in the SW4 signal to draw a high segment from 0 to 5 μs. When you release the mouse button,
WaveFormer Lite switches your state to LOW.
5. Click and drag in the SW4 signal to draw a low segment from 5 us to 6.8 μs.
6. Follow similar procedure to enter the rest of the input signals. You will get a waveform similar to the one shown in
Figure 7-18 .
A waveform was pre-drawn for you and you can find it in the stimulus folder.
Figure 7-18. Testbench Waveform for the Tutorial Design
7. After creating the waveforms, select Save As from the File menu. In the Save As dialog box, enter test_tbench.btim
as the file name and click Save .
8. After saving the timing diagram file, select Export Timing Diagram As from the Export menu.
9. Select VHDL w/ Top Level Testbench in Files of Type and enter test_tbench.vhd for the file name, as shown in
Figure 7-19 .
Figure 7-19. Export VHDL Testbench Save As Dialog Box
The WaveFormer Lite Report window displays the VHDL testbench with a component declaration and
instantiation inside.
10. Exit WaveFormer Lite ( File > Exit ). The File Manager displays the stimulus files. The design is ready to simulate
under ModelSim.
Alternatively, you can create a testbench using the HDL editor.
To create a testbench using the HDL editor:
1. From the File menu, select New . This opens the New File dialog box.