63
MC96F6432S
ABOV Semiconductor Co., Ltd.
9.3
P0 Port
9.3.1
P0 Port Description
P0 is 8-bit I/O port. P0 control registers consist of P0 data register (P0), P0 direction register (P0IO), debounce
enable register (P0DB), P0 pull-up resistor selection register (P0PU), and P0 open-drain selection register (P0OD).
Refer to the port function selection registers for the P0 function selection.
9.3.2
Register description for P0
P0 (P0 Data Register): 80H
7
6
5
4
3
2
1
0
P07
P06
P05
P04
P03
P02
P01
P00
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
P0[7:0]
I/O Data
NOTE)
1.
Do not use the “direct bit test and branch” instruction for input port. More detail information is at chapter
17.2 Instructions on how to use the input port.
Example) Avoid direct input port bit test and branch condition as below
if(P00)
→
if(P0 & 0x01)
P0IO (P0 Direction Register): A1H
7
6
5
4
3
2
1
0
P07IO
P06IO
P05IO
P04IO
P03IO
P02IO
P01IO
P00IO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
P0IO[7:0]
P0 Data I/O Direction.
0
Input
1
Output
NOTE)
1.
EC3/EINT0 ~ EINT5 function possible when input
P0PU (P0 Pull-up Resistor Selection Register): ACH
7
6
5
4
3
2
1
0
P07PU
P06PU
P05PU
P04PU
P03PU
P02PU
P01PU
P00PU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value: 00H
P0PU[7:0]
Configure Pull-up Resistor of P0 Port
0
Disable
1
Enable
Summary of Contents for MC96F6432S Series
Page 15: ...15 MC96F6432S ABOV Semiconductor Co Ltd 4 Package Diagram Figure 4 1 44 Pin MQFP Package...
Page 16: ...16 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 2 32 Pin LQFP Package...
Page 17: ...17 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 3 32 Pin SOP Package...
Page 18: ...18 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 4 28 Pin SOP Package...
Page 19: ...19 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 5 28 Pin TSSOP Package...
