226
MC96F6432S
ABOV Semiconductor Co., Ltd.
VSS
R
’
R
’
R
’
R
’
VLC0
VLC1
VLC2
VLC3
VLCD
(1/ 4 BIAS)
VSS
R
’
R
’
VLC0
VLC1
VLC2
VLC3
VLCD
(1/ 2 BIAS)
VSS
R
’
R
’
R
’
VLC0
VLC1
VLC2
VLC3
VLCD
(1/ 3 BIAS)
LCTEN
DISP
C
o
n
tr
a
s
t
C
o
n
tr
o
lle
r
LCTEN
DISP
C
o
n
tr
a
s
t
C
o
n
tr
o
lle
r
LCTEN
DISP
C
o
n
tr
a
s
t
C
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r
NOTE)
3. When the external resistor bias is selected, the internal resistors for bias are disconnected.
4. When the external resistor bias is selected, the dividing resistors should be connected like the
above figure and the needed bias pins should be selected as the LCD bias function pins (VLC0,
VLC1, VLC2, and VLC3) by P4FSR register.
5. When it is 1/2 bias, the P43/VLC0 and P41/VLC2 pins should be selected as VLC0 and VLC2
functions. The other pins can be used for normal I/O.
6. When it is 1/3 bias, the P43/VLC0, P42/VLC1, and P41/VLC2 pins should be selected as VLC0,
VLC1, and VLC2 functions. Another pin can be used for normal I/O.
7. When it is 1/4 bias, the P43/VLC0, P42/VLC1, P41/VLC2, and P40/VLC3 pins should be selected
as VLC0, VLC1, VLC2, and VLC3 functions
Figure 11.80
External Resistor Bias Connection
Summary of Contents for MC96F6432S Series
Page 15: ...15 MC96F6432S ABOV Semiconductor Co Ltd 4 Package Diagram Figure 4 1 44 Pin MQFP Package...
Page 16: ...16 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 2 32 Pin LQFP Package...
Page 17: ...17 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 3 32 Pin SOP Package...
Page 18: ...18 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 4 28 Pin SOP Package...
Page 19: ...19 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 5 28 Pin TSSOP Package...
