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MC96F6432S
ABOV Semiconductor Co., Ltd.
11.8.4 8-bit Timer 3, 4 Capture Mode
The 8-bit Capture 3 and 4 mode is selected by control register as shown in Figure 11.32.
The timer 3, 4 capture mode is set by T3MS, T4MS as
‘1’. The clock source can use the internal/external clock.
Basically, it has the same function as the 8-bit timer/counter mode and the interrupt occurs when T3CNT, T4CNT is
equal to T3DR, T4DR. The T3CNT, T4CNT value is automatically cleared by match signal.
This timer interrupt in capture mode is very useful when the pulse width of captured signal is wider than the maximum
period of timer.
The capture result is loaded into T3CAPR, T4CAPR. In the timer 3, 4 capture mode, timer 3, 4 output (T3O, T4O)
waveform is not available.
According to the EIPOL0L register setting, the external interrupt EINT0 and EINT1 function is chose. Of course, the
EINT0 and EINT1 pins must be set to an input port.
The T3CAPR and T3DR are in the same address. In the capture mode, reading operation reads T3CAPR, not T3DR
and writing operation will update T3DR. The T4CAPR has the same function.
Summary of Contents for MC96F6432S Series
Page 15: ...15 MC96F6432S ABOV Semiconductor Co Ltd 4 Package Diagram Figure 4 1 44 Pin MQFP Package...
Page 16: ...16 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 2 32 Pin LQFP Package...
Page 17: ...17 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 3 32 Pin SOP Package...
Page 18: ...18 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 4 28 Pin SOP Package...
Page 19: ...19 MC96F6432S ABOV Semiconductor Co Ltd Figure 4 5 28 Pin TSSOP Package...
