VCU1287 Characterization Board
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27
UG1121 (v1.0) December 11, 2015
Chapter 3:
Board Component Descriptions
300 MHz LVDS Oscillator
The VCU1287 board has one 300 MHz LVDS oscillator U42 (callout 12,
Figure 2-1
)
connected to multi-region clock capable (MRCC) inputs on the FPGA.
Table 3-8
lists the
FPGA pin connections to the LVDS oscillator.
Differential SMA MRCC Pin Inputs
The VCU1287 board provides two pairs of differential SMA transceiver clock inputs (callout
34,
Figure 2-1
) that can be used for connecting to an external clock source. The FPGA MRCC
pins are connected to the SMA connectors as shown in
Table 3-9
.
Table 3-8:
LVDS Oscillator MRCC Connections
FPGA (U1)
Schematic
Net Name
Device (42)
Pin
Function
Direction I/O Standard
Pin
Function
Direction
AW14
SYSTEM CLOCK_P
Input
LVDS
LVDS_OSC_P
4
300 MHz LVDS
oscillator
Output
AW13
SYSTEM CLOCK_N
Input
LVDS
LVDS_OSC_N
5
300 MHz LVDS
oscillator
Output
Table 3-9:
Differential SMA Clock Connections
FPGA(U1)
Schematic Net
Name
SMA Connector
Pin
Function
Direction
IOSTANDARD
L32
USER CLOCK_1_P
INPUT
LVDS
CLK_DIFF_1_P
J84
K32
USER CLOCK_1_N
INPUT
LVDS
CLK_DIFF_1_N
J85
M31
USER CLOCK_2_P
INPUT
LVDS
CLK_DIFF_2_P
J83
M32
USER CLOCK_2_N
INPUT
LVDS
CLK_DIFF_2_N
J86
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