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38
VM1548C Programming
The Model VM1548C Digital I/O Module supports direct access to the six 8-bit data ports via the
Device Dependent Registers of VXIbus interface. The specific registers are located in A16
Memory at offsets 0x20 = Port1, 0x21 = Port0, 0x22 = Port3, 0x23 = Port2, 0x24 = Port5 and
0x25 = Port4. The following diagram shows A16 Memory and the Model VM1548C Data Port
Map.
T
ABLE
3-2:
A16
M
EMORY
M
AP
Offset
Register
3E
3C
3A
38
36
34
32
30
2E
Event (R/W)
2C
Source Data Polarity (R/W)
2A
Clear ISENSE (R/W)
28
IPINS (R)
ISENSE (R)
26
Read Clocks (R)
Read I/O Control (R)
24
Port 5
Port 4
22
Port 3
Port 2
20
Port 1
Port 0
1E
1C
1A
18
16
[ A32 Pointer Low ]
14
[ A32 Pointer High ]
12
[ A24 Pointer Low ]
10
[ A24 Pointer High ]
E
Data Low
C
Data High
A
Response [/Data Extended]
8
Protocol [/Signal] Register
6
[Offset Register]
4
Status / Control Register
2
Device Type
Содержание VM1548C
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Страница 5: ...www vxitech com VM1548C Preface 5 Clock Enable 102 Latch Data 103 Read Data 104 INDEX 105...
Страница 16: ...VXI Technology Inc 16 VM1548C Introduction...
Страница 44: ...VXI Technology Inc 44 VM1548C Programming...
Страница 96: ...VXI Technology Inc 96 VM1548C Command Dictionary...