Toshiba TLCS-870/C Series, Руководство пользователя

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2. Operational Description
2.2 System Clock Controller
TMP86PM29BUG
The data memory contents become unstable when the power supply is turned on; therefore, the data memory
should be initialized by an initialization routine.
2.2 System Clock Controller
The system clock controller consists of a clock generator, a timing generator, and a standby controller.
Figure 2-2 System Colck Control
2.2.1 Clock Generator
The clock generator generates the basic clock which provides the system clocks supplied to the CPU core
and peripheral hardware. It contains two oscillation circuits: One for the high-frequency clock and one for the
low-frequency clock. Power consumption can be reduced by switching of the standby controller to low-power
operation based on the low-frequency clock.
The high-frequency (fc) clock and low-frequency (fs) clock can easily be obtained by connecting a resonator
between the XIN/XOUT and XTIN/XTOUT pins respectively. Clock input from an external oscillator is also
possible. In this case, external clock is applied to XIN/XTIN pin with XOUT/XTOUT pin not connected.
Example :Clears RAM to “00H”. (TMP86PM29BUG)
LD HL, 0040H ; Start address setup
LD A, H ; Initial value (00H) setup
LD BC, 05FFH
SRAMCLR: LD (HL), A
INC HL
DEC BC
JRS F, SRAMCLR
TBTCR
SYSCR2 SYSCR1
XIN
XOUT
XTIN
XTOUT
fc
0036H
0038H 0039H
fs
Timing generator control register
Timing
generator
Standby controller
System clocks
Clock generator control
High-frequency
clock oscillator
Low-frequency
clock oscillator
Clock
generator
System control registers