Toshiba e-studio 151, Руководство по обслуживанию

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e-STUDIO162/162D/151/151D ELECTRICAL SECTION 13 - 7
(4) Reset circuit
This circuit detects ON/OFF of the power source, and controls start/
stop of each circuit. The voltage of 3.3V in the MCU PWB is detected
by the reset IC to generate the reset signal.
When the power voltage reaches the specified level, each circuit is
operated, but stopped before the power voltage falls below the speci-
fied level in order to protect against malfunction of the circuit. The
CPU/Flash ROM is reset by the power reset circuit, and system reset
of ASIC, OA982, FAX, and NIC is generated from the CPU (general-
purpose port output).
254 ram_data6 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
255 ram_data5 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
256 ram_data4 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
257 GND_core Power
258 ram_data3 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
259 ram_data2 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
260 ram_data1 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
261 ram_data0 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
262 GND_AC Power
263 ram_data15 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
264 ram_data14 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
265 VCC_AC Power
266 ram_data13 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
267 ram_data12 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
268 ram_data11 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
269 ram_data10 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
270 ram_data9 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
271 ram_data8 IN/OUT SDRAM SDRAM (Image
process page
memory) data bus
272 VCC_core Power
273 ram_dqm1 OUT SDRAM SDRAM (Image
process page
memory) DQM signal
274 ram_cke OUT SDRAM SDRAM (Image
process page
memory) CKE signal
275 GND_AC Power
276 ram_clk_out SDRAM SDRAM's clock
277 GND_core Power
278 ram_mad12 OUT SDRAM SDRAM (Image
process page
memory) address bus
279 ram_mad11 OUT SDRAM SDRAM (Image
process page
memory) address bus
280 ram_mad9 OUT SDRAM SDRAM (Image
process page
memory) address bus
PIN
No.
Signal Name IN/OUT Connected to Description
281 VCC_core Power
282 ram_mad8 OUT SDRAM SDRAM (Image
process page
memory) address bus
283 ram_mad7 OUT SDRAM SDRAM (Image
process page
memory) address bus
284 VCC_AC Power
285 ram_mad6 OUT SDRAM SDRAM (Image
process page
memory) address bus
286 ram_mad5 OUT SDRAM SDRAM (Image
process page
memory) address bus
287 ram_mad4 OUT SDRAM SDRAM (Image
process page
memory) address bus
288 GND_AC Power
289 cpudata15 IN/OUT CPU CPU data bus
290 cpudata14 IN/OUT CPU CPU data bus
291 cpudata13 IN/OUT CPU CPU data bus
292 cpudata12 IN/OUT CPU CPU data bus
293 cpudata11 IN/OUT CPU CPU data bus
294 cpudata10 IN/OUT CPU CPU data bus
295 cpudata9 IN/OUT CPU CPU data bus
296 cpudata8 IN/OUT CPU CPU data bus
PIN
No.
Signal Name IN/OUT Connected to Description
R18
11kF
21
C22
0.1u
1
2
C23
OPEN
1
2
R20
10kF
21
IC4
M51957BFP
NC
8
GND
4
VCC
7
NC
1
IN
2
NC
3
Cd
5
OUT
6
R19
3.3kJ
21
VCC3 VCC3
/RESET0 (2-C4)
Reset IC
e-STUDIO162_151.book 7 ページ ２００４年１２月２日 木曜日 午後９時３７分