Supero SUPER P6DGH, Руководство пользователя

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Chapter 5: Running Setup
5-9
PCI1 to PCI0 Access
The settings for this option are Enabled or Disabled. Set to Enabled to
enable access between two different PCI buses (PCI1 and PCI0).
Memory Autosizing Support
The BIOS can dynamically detect and size SDRAM and EDO in a system
populated with memory that has no SPD information. Set to Enable for
memory that does not have SPD information or to bypass the SPD. The
settings for this option are Auto or Enable.
DRAM Integrity Mode
The settings for this option are None, EC or ECC Hardware. Note: For
ECC memory only. See the table below to set the type of system
memory checking. (Note: New BIOS versions automatically detect this
setting so the user does not need to set it.)
Setting Description
None No error checking or error reporting is done.
EC Multibit errors are detected and reported as parity
errors. Single-bit errors are corrected by the chipset.
Corrected bits of data from memory are not written
back to DRAM system memory.
ECC Multibit errors are detected and reported as parity
H a r d w a r e errors. Single-bit errors are corrected by the
chipset and written back to DRAM system memory.
If a soft (correctable) error occurs, writing the fixed
data back to DRAM system memory will resolve the
problem. Most DRAM errors are soft errors. If a hard
(uncorrectable) error occurs, writing the fixed data
back to DRAM system memory does not solve the
problem. In this case, the second time the error
occurs in the same location, a Parity Error is reported,
indicating an uncorrectable error. If ECC is selected,
AMIBIOS automatically enables the System
Management Interface (SMI). If you do not want to
enable power management, set the Power
Management/APM option to Disabled and set all
Power Management Setup timeout options to