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SPI Slave Timing
Table 4.29. SPI Slave Timing
Parameter Symbol Test Condition Min Typ Max Unit
SCKL period
1 2
t
SCLK_sl
2 *
t
HFPERCLK
— — ns
SCLK high period
1 2 t
SCLK_hi
3 *
t
HFPERCLK
— — ns
SCLK low period
1 2 t
SCLK_lo
3 *
t
HFPERCLK
— — ns
CS active to MISO
1 2 t
CS_ACT_MI
4 — 50 ns
CS disable to MISO
1 2 t
CS_DIS_MI
4 — 50 ns
MOSI setup time
1 2 t
SU_MO
4 — — ns
MOSI hold time
1 2 t
H_MO
3 + 2 *
t
HFPERCLK
— — ns
SCLK to MISO
1 2
t
SCLK_MI
16 +
t
HFPERCLK
— 66 + 2 *
t
HFPERCLK
ns
Note:
1. Applies for both CLKPHA = 0 and CLKPHA = 1 (figure only shows CLKPHA = 0)
2. Measurement done with 8 pF output loading at 10% and 90% of V
DD
(figure shows 50% of V
DD
)
CS
SCLK
CLKPOL = 0
MOSI
MISO
t
CS_ACT_MI
t
SCLK_HI
t
SCLK
t
SU_MO
t
H_MO
t
SCLK_MI
t
CS_DIS_MI
t
SCLK_LO
SCLK
CLKPOL = 1
Figure 4.2. SPI Slave Timing Diagram
BGM11S Blue Gecko Bluetooth
®
SiP Module Data Sheet
Electrical Specifications
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