3.5
Parallel Interfaces
The parallel ports are fully compatible with the new IEEE 1284 standard, including level 2 support. The
parallel port consists of an Enhanced Parallel Port (EPP1.7/1.9) and an Extended Capabilities Port (ECP
16Byte FIFO + DMA support). The new modes allow higher transfer rates up to 1 Mbyte/s. Via BIOS
Setup, the operating modes of the parallel interface can be selected.
The following modes are supported:
Mode
Average transfer rate (Read) Average transfer rate (Write)
Standard
100 Kbyte/s
200 Kbyte/s
EPP
1 Mbyte/s
1 Mbyte/s
ECP
1 Mbyte/s
1 Mbyte/s
On a standard PC, three address areas are defined for a parallel interface. The parallel interface is I/O-
mapped to one of the following addresses:
Name
Address
LPT1
$03BC
LPT2
$0378
LPT3
$0278
The address range $3BC cannot be used with EPP operation.
Each parallel channel provides the identical register set shown in the table below.
Address
Offset
Standard
EPP
only important for ECP
Mode # ECR(5-7)
ECP
$000
Data (R/W)
Data(R/W)
000,001
Data Register(R/W)
$000
"
"
011
$001
Status(R)
Status(R)
ALL
ECP Address FIFO(W)
$002
Control(R/W) Control(R/W)
ALL
Status Register(R)
$003
Address(R/W)
Control Register(R/W)
$004
Data Port 0 (R/W)
$005
Data Port 1 (R/W)
$006
Data Port 2 (R/W)
$007
Data Port 3 (R/W)
$400
010
Parallel Port Data FIFO(W)
$400
011
ECP Data FIFO(R/W)
$400
110
Test FIFO(R/W)
$400
111
Configuration Register A(R)
$401
111
Configuration Register B(R)
$402
ALL
Ext. Control Register(R/W)
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