3.2.3 : VPX P2
VPX P2 is the card’s VPX Expansion plane. The Open VPX Standard (VITA 65) defines the expansion
plane as a plane that is dedicated to communication between a logical controlling system element and a
separate, but logically adjunct, system resource. The VP3500 uses this plane to route the majority of its
MiniPCIe custom IO connector to the VPX backplane. Each of the two MiniPCIe custom IO connectors
have 20 differential and 8 single-ended signals where the first 16 differential and 4 single-ended are
routed to P2 as illustrated below.
Pin
Row G
Row F
Row E
Row D
Row C
Row B
Row A
1
MP1_SE0
GND
MP1_DX1-
GND
MP1_DX0-
2
GND
MP1_DX3-
GND
MP1_DX2-
GND
3
MP1_SE1
GND
MP1_DX5-
GND
MP1_DX4-
4
GND
MP1_DX7-
GND
MP1_DX6-
GND
5
MP1_SE2
GND
MP1_DX9-
GND
MP1_DX8-
6
GND
MP1_DX11-
M
GND
MP1_DX10-
M
GND
7
MP1_SE3
GND
MP1_DX13-
M
GND
MP1_DX12-
M
8
GND
MP1_DX15-
M
GND
MP1_DX14-
M
GND
9
MP2_SE0
GND
MP2_DX1-
GND
MP2_DX0-
10
GND
MP2_DX3-
GND
MP2_DX2-
GND
11
MP2_SE1
GND
MP2_DX5-
GND
MP2_DX4-
12
GND
MP2_DX7-
GND
MP2_DX6-
GND
13
MP2_SE2
GND
MP2_DX9-
GND
MP2_DX8-
14
GND
MP2_DX11-
M
GND
MP2_DX10-
M
GND
15
MP2_SE3
GND
MP2_DX13-
M
GND
MP2_DX12-
M
16
GND
MP2_DX15-
M
GND
MP2_DX14-
M
GND
Table 4 : VPX P2 Signals
MP1_DX
16x MiniPCIe socket 1 IO connector differential signals
MP2_DX
16x MiniPCIe socket 2 IO connector differential signals
MP1_SE
4x MiniPCIe socket 1 IO connector single-ended signals
MP2_SE
4x MiniPCIe socket 2 IO connector single-ended signals
Note: For the MiniPCIe custom IO connector pin definitions please see section 3.7.
VP3500 User Manual • Document Number 101-3500-0001 • Revision A0
Property of Rigel Engineering, LLC. Confidential & Proprietary
690 Cone Park Court, Merritt Island, Florida 32952
page 33